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 PD - 96098
AUTOMOTIVE MOSFET
Features
l l l l l l
IRF2903ZSPbF IRF2903ZLPBF
HEXFET(R) Power MOSFET
D
Advanced Process Technology Ultra Low On-Resistance 175C Operating Temperature Fast Switching Repetitive Avalanche Allowed up to Tjmax Lead-Free
VDSS = 30V RDS(on) = 2.4m
G S
ID = 75A
D
Description
Specifically designed for Automotive applications, this HEXFET(R) Power MOSFET utilizes the latest processing techniques to achieve extremely low on-resistance per silicon area. Additional features of this design are a 175C junction operating temperature, fast switching speed and improved repetitive avalanche rating . These features combine to make this design an extremely efficient and reliable device for use in Automotive applications and a wide variety of other applications.
D
G
D
S G D
S
D2Pak G D
TO-262 S
Gate
Drain
Source
Absolute Maximum Ratings
Parameter
ID @ TC = 25C ID @ TC = 100C ID @ TC = 25C IDM PD @TC = 25C VGS EAS (Thermally limited) EAS (Tested ) IAR EAR TJ TSTG Continuous Drain Current, VGS @ 10V (Silicon Limited) Continuous Drain Current, VGS @ 10V (Silicon Limited) Continuous Drain Current, VGS @ 10V (Package Limited) Pulsed Drain Current Power Dissipation Linear Derating Factor Gate-to-Source Voltage Single Pulse Avalanche Energyd Single Pulse Avalanche Energy Tested Value Avalanche CurrentA Repetitive Avalanche Energy Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds
Max.
235 166 75 1020 231 1.54 20 231 820 See Fig.12a, 12b, 15, 16 -55 to + 175
Units
A
h
W W/C V mJ A mJ C
g
300 (1.6mm from case )
Thermal Resistance
RJC RJA RJA Junction-to-Case Junction-to-Ambient Junction-to-Ambient (PCB Mount, steady state)
j
Parameter
Typ.
Max.
0.65 62 40
Units
j
ij
--- --- ---
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1
04/06/07
IRF2903ZS/ZLPbF
Electrical Characteristics @ TJ = 25C (unless otherwise specified)
Parameter
V(BR)DSS V(BR)DSS/TJ RDS(on) VGS(th) gfs IDSS IGSS Qg Qgs Qgd td(on) tr td(off) tf LD LS Ciss Coss Crss Coss Coss Coss eff. Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Forward Transconductance Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Internal Drain Inductance Internal Source Inductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Output Capacitance Output Capacitance Effective Output Capacitance
Min. Typ. Max. Units
30 --- --- 2.0 120 --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- 0.021 1.9 --- --- --- --- --- --- 160 51 58 24 100 48 37 4.5 7.5 6320 1980 1100 5930 2010 3050 --- --- 2.4 4.0 --- 20 250 200 -200 240 --- --- --- --- --- --- --- --- --- --- --- --- --- --- V V/C m V S A nA
Conditions
VGS = 0V, ID = 250A Reference to 25C, ID = 1mA VGS = 10V, ID = 75A VDS = VGS, ID = 150A VDS = 10V, ID = 75A VDS = 30V, VGS = 0V VDS = 30V, VGS = 0V, TJ = 125C VGS = 20V VGS = -20V ID = 75A VDS = 24V VGS = 10V VDD = 15V ID = 75A RG = 3.2 VGS = 10V
e
nC
e e
ns
nH
pF
Between lead, 6mm (0.25in.) from package and center of die contact VGS = 0V VDS = 25V = 1.0MHz VGS = 0V, VDS = 1.0V, = 1.0MHz VGS = 0V, VDS = 24V, = 1.0MHz VGS = 0V, VDS = 0V to 24V
f
Source-Drain Ratings and Characteristics
Parameter
IS ISM VSD trr Qrr ton Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode)A Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Forward Turn-On Time
Min. Typ. Max. Units
--- --- --- --- --- --- --- --- 34 29 75 A 1020 1.3 51 44 V ns nC
Conditions
MOSFET symbol showing the integral reverse p-n junction diode. TJ = 25C, IS = 75A, VGS = 0V TJ = 25C, IF = 75A, VDD = 15V di/dt = 100A/s
e
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
e
2
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IRF2903ZS/ZLPbF
1000
TOP
1000
ID, Drain-to-Source Current (A)
100
BOTTOM
ID, Drain-to-Source Current (A)
VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V 4.5V
TOP
BOTTOM
VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V 4.5V
100
10
4.5V 60s PULSE WIDTH Tj = 175C
10 0.1 1 10 100 1000
4.5V 60s PULSE WIDTH Tj = 25C
1 0.1 1 10 100 1000
VDS, Drain-to-Source Voltage (V)
VDS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
1000.0
240
Gfs, Forward Transconductance (S)
TJ = 25C 200 160 120 80 40 0 0 20 40 60 80 100 120 140 160 180 ID, Drain-to-Source Current (A) TJ = 175C
ID, Drain-to-Source Current()
100.0
TJ = 175C
10.0
1.0
TJ = 25C VDS = 25V 60s PULSE WIDTH
VDS = 10V
0.1 2.0 3.0 4.0 5.0 6.0 7.0 8.0 9.0 10.0
380s PULSE WIDTH
VGS, Gate-to-Source Voltage (V)
Fig 3. Typical Transfer Characteristics
Fig 4. Typical Forward Transconductance Vs. Drain Current
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IRF2903ZS/ZLPbF
12000 VGS = 0V, f = 1 MHZ Ciss = Cgs + Cgd, Cds SHORTED Crss = Cgd Coss = Cds + Cgd 8000
20
VGS, Gate-to-Source Voltage (V)
ID= 75A 16
10000
VDS = 24V VDS= 15V
C, Capacitance (pF)
Ciss
6000
12
8
4000
Coss
2000
4
Crss
0 1 10 100
0 0 40 80 120 160 200 240 QG Total Gate Charge (nC)
VDS , Drain-to-Source Voltage (V)
Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage
Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage
1000.0
10000
TJ = 175C
ISD , Reverse Drain Current (A)
OPERATION IN THIS AREA LIMITED BY R DS(on)
ID, Drain-to-Source Current (A)
100.0
1000 1msec 100 100sec
10.0
TJ = 25C
1.0
10
LIMITED BY PACKAGE
10msec
1
VGS = 0V
0.1 0.0 0.4 0.8 1.2 1.6 2.0 2.4
Tc = 25C Tj = 175C Single Pulse 0.1 1
DC
0.1 10 100
VSD, Source-to-Drain Voltage (V)
VDS , Drain-toSource Voltage (V)
Fig 7. Typical Source-Drain Diode Forward Voltage
Fig 8. Maximum Safe Operating Area
4
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IRF2903ZS/ZLPbF
RDS(on) , Drain-to-Source On Resistance (Normalized)
240 200 Limited By Package
2.0
ID = 75A VGS = 10V
ID, Drain Current (A)
160 120 80 40 0 25 50 75 100 125 150 175 T C , Case Temperature (C)
1.5
1.0
0.5 -60 -40 -20 0 20 40 60 80 100 120 140 160 180
TJ , Junction Temperature (C)
Fig 9. Maximum Drain Current Vs. Case Temperature
Fig 10. Normalized On-Resistance Vs. Temperature
1
D = 0.50
Thermal Response ( Z thJC )
0.1
0.20 0.10 0.05 0.02 0.01
0.01
SINGLE PULSE ( THERMAL RESPONSE )
0.001 1E-006 1E-005 0.0001 0.001
Notes: 1. Duty Factor D = t1/t2 2. Peak Tj = P dm x Zthjc + Tc
0.01 0.1
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5
IRF2903ZS/ZLPbF
15V
600
EAS, Single Pulse Avalanche Energy (mJ)
VDS
L
DRIVER
500
ID 26A 42A BOTTOM 75A
TOP
400
RG
20V VGS
D.U.T
IAS tp
+ V - DD
A
300
0.01
Fig 12a. Unclamped Inductive Test Circuit
V(BR)DSS tp
200
100
0 25 50 75 100 125 150 175
Starting T J, Junction Temperature (C)
I AS
Fig 12b. Unclamped Inductive Waveforms
QG
Fig 12c. Maximum Avalanche Energy Vs. Drain Current
10 V
QGS
QGD
VGS(th) Gate threshold Voltage (V)
4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 -75 -50 -25 0 25 50 75
VG
ID = 1.0A ID = 1.0mA ID = 250A ID = 150A
Charge
Fig 13a. Basic Gate Charge Waveform
Current Regulator Same Type as D.U.T.
50K 12V .2F .3F
D.U.T. VGS
3mA
+ V - DS
100 125 150 175
TJ , Temperature ( C )
IG ID
Current Sampling Resistors
Fig 13b. Gate Charge Test Circuit
Fig 14. Threshold Voltage Vs. Temperature
6
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IRF2903ZS/ZLPbF
1000
Duty Cycle = Single Pulse
Avalanche Current (A)
100
0.01 0.05 0.10
Allowed avalanche Current vs avalanche pulsewidth, tav assuming Tj = 25C due to avalanche losses. Note: In no case should Tj be allowed to exceed Tjmax
10
1 1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01
tav (sec)
Fig 15. Typical Avalanche Current Vs.Pulsewidth
160
EAR , Avalanche Energy (mJ)
120
TOP Single Pulse BOTTOM 1% Duty Cycle ID = 75A
80
40
0 25 50 75 100 125 150
Notes on Repetitive Avalanche Curves , Figures 15, 16: (For further info, see AN-1005 at www.irf.com) 1. Avalanche failures assumption: Purely a thermal phenomenon and failure occurs at a temperature far in excess of T jmax. This is validated for every part type. 2. Safe operation in Avalanche is allowed as long asTjmax is not exceeded. 3. Equation below based on circuit and waveforms shown in Figures 12a, 12b. 4. PD (ave) = Average power dissipation per single avalanche pulse. 5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 6. Iav = Allowable avalanche current. 7. T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as 25C in Figure 15, 16). tav = Average time in avalanche. D = Duty cycle in avalanche = tav *f ZthJC(D, tav ) = Transient thermal resistance, see figure 11) 175 PD (ave) = 1/2 ( 1.3*BV*Iav) = DT/ ZthJC Iav = 2DT/ [1.3*BV*Zth] EAS (AR) = PD (ave)*tav
Starting T J , Junction Temperature (C)
Fig 16. Maximum Avalanche Energy Vs. Temperature
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IRF2903ZS/ZLPbF
Driver Gate Drive
D.U.T
+
P.W.
Period
D=
P.W. Period VGS=10V
+
Circuit Layout Considerations * Low Stray Inductance * Ground Plane * Low Leakage Inductance Current Transformer
*
D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt
-
-
+
RG
* * * * dv/dt controlled by RG Driver same type as D.U.T. I SD controlled by Duty Factor "D" D.U.T. - Device Under Test
VDD
VDD
+ -
Re-Applied Voltage Inductor Curent
Body Diode
Forward Drop
Ripple 5%
ISD
* VGS = 5V for Logic Level Devices Fig 17. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET(R) Power MOSFETs
RD
V DS VGS RG 10V
Pulse Width 1 s Duty Factor 0.1 %
D.U.T.
+
-VDD
Fig 18a. Switching Time Test Circuit
VDS 90%
10% VGS
td(on) tr t d(off) tf
Fig 18b. Switching Time Waveforms
8
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IRF2903ZS/ZLPbF
D2Pak Package Outline
Dimensions are shown in millimeters (inches)
D2Pak Part Marking Information
UCDTADTA6IADSA$"TAXDUC GPUA8P9@A'!# 6TT@H7G@9APIAXXA!A! DIAUC@A6TT@H7GAGDI@AAGA DIU@SI6UDPI6G S@8UDAD@S GPBP 6TT@H7G GPUA8P9@ Q6SUAIVH7@S A$"T 96U@A8P9@ @6SAA2A! X@@FA! GDI@AG
25
DIU@SI6UDPI6G S@8UDAD@S GPBP 6TT@H7G GPUA8P9@ A$"T
Q6SUAIVH7@S 96U@A8P9@ QA2A9@TDBI6U@TAG@69AAAS@@ QSP9V8UAPQUDPI6G @6SAA2A! X@@FA! 6A2A6TT@H7GATDU@A8P9@
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IRF2903ZS/ZLPbF
TO-262 Package Outline
Dimensions are shown in millimeters (inches)
TO-262 Part Marking Information
@Y6HQG@) UCDTADTA6IADSG" "G GPUA8P9@A &'( 6TT@H7G@9APIAXXA (A ((& DIAUC@A6TT@H7GAGDI@AA8A DIU@SI6UDPI6G S@8UDAD@S GPBP 6TT@H7G GPUA8P9@ Q6SUAIVH7@S
96U@A8P9@ @6SA&A2A ((& X@@FA ( GDI@A8
25
DIU@SI6UDPI6G S@8UDAD@S GPBP 6TT@H7G GPUA8P9@ Q6SUAIVH7@S
96U@A8P9@ QA2A9@TDBI6U@TAG@69AS@@ QSP9V8UAPQUDPI6G @6SA&A2A ((& X@@FA ( 6A2A6TT@H7GATDU@A8P9@
10
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IRF2903ZS/ZLPbF
D2Pak Tape & Reel Information
TRR
1.60 (.063) 1.50 (.059) 4.10 (.161) 3.90 (.153)
1.60 (.063) 1.50 (.059) 0.368 (.0145) 0.342 (.0135)
FEED DIRECTION 1.85 (.073)
1.65 (.065)
11.60 (.457) 11.40 (.449)
15.42 (.609) 15.22 (.601)
24.30 (.957) 23.90 (.941)
TRL
10.90 (.429) 10.70 (.421) 1.75 (.069) 1.25 (.049) 16.10 (.634) 15.90 (.626) 4.72 (.136) 4.52 (.178)
FEED DIRECTION
13.50 (.532) 12.80 (.504)
27.40 (1.079) 23.90 (.941)
4
330.00 (14.173) MAX.
60.00 (2.362) MIN.
NOTES : 1. COMFORMS TO EIA-418. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION MEASURED @ HUB. 4. INCLUDES FLANGE DISTORTION @ OUTER EDGE.
30.40 (1.197) MAX.
26.40 (1.039) 24.40 (.961) 3
4
Limited by TJmax , see Fig.12a, 12b, 15, 16 for typical repetitive max. junction temperature. (See fig. 11). avalanche performance. Limited by TJmax, starting TJ = 25C, L = 0.10mH This value determined from sample failure population. 100% RG = 25, IAS = 75A, VGS =10V. Part not tested to this value in production. recommended for use above this value. This is applied to D2Pak, when mounted on 1" square PCB (FR Pulse width 1.0ms; duty cycle 2%. 4 or G-10 Material). For recommended footprint and soldering Coss eff. is a fixed capacitance that gives the techniques refer to application note #AN-994. same charging time as Coss while VDS is rising R is measured at TJ approximately 90C from 0 to 80% VDSS . Repetitive rating; pulse width limited by Data and specifications subject to change without notice. This product has been designed and qualified for the Automotive [Q101]market. Qualification Standards can be found on IR's Web site.
Notes:
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information. 04/2007
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11


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